1. Field of the Invention
The present invention relates to a method for stacking semiconductor substrates, and more specifically to a method for sequentially stacking a plurality of thin film devices on a semiconductor substrate.
2. Description of Related Art
One conventional method for fabricating a three-dimensional LSI (large scaled integrated circuit) is composed of mutually bonding or laminating semiconductor substrates each of which includes thereon devices such as MOS transistors (Masaaki YASUMOTO et al, "Semiconductor World." 5., pp 1-8). In this method, more specifically, there are first prepared a pair of semiconductor substrates, each of which comprises a device layer in which one or more devices have already formed and a plurality of connection electrodes formed of for example gold bumps deposited on the device layer. Thereafter, the pair of semiconductor substrates are aligned to each other in such a manner that the device layer of one semiconductor substrate faces the device layer of the other semiconductor substrate and the connection electrodes formed on the device layer of one semiconductor substrate are in alignment with the corresponding connection electrodes formed on the device layer of the other semiconductor substrate, and the pair of semiconductor substrates thus aligned to each other are bonded to each other so as to form a three-dimensional LSI of a double layer structure.
However, the above mentioned stacking method as it is cannot form a device having three or more device layers. If one dares to stack three or more device layers by utilizing the above mentioned method, it would be necessary to remove a substrate portion of a selected one of the pair of stacked semiconductor substrates so as to leave only the device layer and the connection electrodes formed on the selected semiconductor substrate by selectively polishing a rear side of the selected semiconductor substrate (Tsuneo HAMAGUCHI et al, "Applied Physics" 56[11], pp 1480, 1987). As a result, a rear face of the device layer, which had been formed on the selected semiconductor substrate before the removal of the selected semiconductor substrate, is exposed, and connection electrodes are formed on the exposed rear face of the device layer for connection with a third device layer. As seen from the above, in order to interconnect three or more device layers by using the above mentioned method, it is necessary to polish a semiconductor substrate having two or more stacked device layers so as to thin the semiconductor substrate. However, there is a fear that a stress acting in the process of polishing acts on the connection electrode to generate a defective connection.